About Me

I am currently working as a Senior GPU Architect at NVIDIA in Santa Clara, investigating memory subsystem architecture for the next generation of GPUs.

I am an alumnus of The University of Edinburgh, where I completed my PhD in the area of Computer Architecture. During my PhD, I was advised by Prof. Nigel Topham and co-advised by Dr. Vijay Nagarajan and was affiliated to the Compiler and Architecture Design Group (CArD) within the Institute of Computing Systems Architecture (ICSA) at the School of Informatics.

During my graduate school, I interned at NVIDIA in the GPU Memory Architecture Group in Santa Clara, USA. In the past, I have also worked at Synopsys as an R&D Engineer in Hyderabad, India. During my undergraduate, I was advised by Dr. Shubhajit Roy Chowdhury for my dissertation at IIIT Hyderabad. In the summer of 2011, I also interned at the University of Cambridge under the supervision of Dr. Neil Collings where I worked on LCOS displays and high-speed display drivers at the Centre for Advanced Photonics and Electronics.

Research Interests

My research interests span across GPU memory systems, shared resource management in throughput-oriented systems and application of machine learning in building computer systems.

Publications

• Poise : Balancing Thread-Level Parallelism and Memory System Performance in GPUs using Machine Learning
  Saumay Dublish, Vijay Nagarajan and Nigel Topham
  IEEE International Symposium on High-Performance Computer Architecture (HPCA)
  Washington D.C., USA, February 16-20, 2019
  [paper]   [slides-pptx]    [slides-pdf]

  
  

• Managing the Memory Hierarchy in GPUs
  Saumay Dublish
  PhD Thesis
  The University of Edinburgh, July 2018
  [thesis]  

  
  

• Evaluating and Mitigating Bandwidth Bottlenecks Across the Memory Hierarchy in GPUs
  Saumay Dublish, Vijay Nagarajan and Nigel Topham
  IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
  Santa Rosa, USA, April 23-25, 2017
  [paper]   [slides-pptx]    [slides-pdf]

  
  

• Cooperative Caching for GPUs
  Saumay Dublish, Vijay Nagarajan and Nigel Topham
  ACM Transactions on Architecture and Code Optimization, 13 (4),39, December 2016 (TACO)
  [paper]   [slides-pptx]    [slides-pdf]

  
  

• Characterizing Memory Bottlenecks in GPGPU Workloads
  Saumay Dublish, Vijay Nagarajan and Nigel Topham
  IEEE International Symposium on Workload Characterization (IISWC)
  Providence, Rhoda Island, USA, September 25-27, 2016
  [paper]   [poster]   

  
  

• Slack-Aware Shared Bandwidth Management in GPUs
  Saumay Dublish
  ACM SRC, The 25th International Conference on Parallel Architectures and Compilation Techniques (PACT)
  Haifa, Israel, September 11-15, 2016
  [paper]   [poster]   

Awards

• ISPASS 2017 Student Travel Grant 2017
  IEEE

• PACT 2016 Student Travel Grant 2016
  ACM SIGARCH

• School of Informatics Doctoral Scholarship 2014-2018
  The University of Edinburgh

• Saranu International Research Scholarship 2014-2018
  The University of Edinburgh

• Cambridge-India Partnership grant 2011
  University of Cambridge

• CanSat Satellite Design Launch Competition Award: Rank-1 2010
  NASA

• World Embedded Software Contest Award: Rank-4 2010
  Ministry of Knowledge Economy, South Korea

Education

• PhD 2014-2018
  The University of Edinburgh

• Bachelor of Technology 2008-2012
  International Institute of Information Technology Hyderabad (IIIT-H)

Work Experience

• NVIDIA 2020-present
  Senior GPU Memory Architect
  




• Synopsys 2019-2020
  Senior Microprocessor Architect
  




• NVIDIA July-October 2017
  GPU Memory Architecture Intern
  




• Synopsys 2012-2014
  R&D Engineer
  




• University of Cambridge May-July 2011
  Center for Advanced Photonics and Electronics (CAPE)
  Research Intern

Teaching

• TA, Introduction to Computer Systems Fall 2016
  The University of Edinburgh

• TA, Computer Design Fall 2014/15/16
  The University of Edinburgh

• TA, Computer Architecture Spring 2016
  The University of Edinburgh

• TA, Computer System Organization Spring 2012
  IIIT Hyderabad

• TA, Embedded Systems-1 Fall 2011
  IIIT Hyderabad

• TA, Basic Electronic Circuit Spring 2011
  IIIT Hyderabad

• TA, Digital Logic and Processors Fall 2010
  IIIT Hyderabad